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An 8GB/s Quad-Skew-Cancelling Parallel Transceiver in 90nm CMOS for High-Speed DRAM Interface

Title
An 8GB/s Quad-Skew-Cancelling Parallel Transceiver in 90nm CMOS for High-Speed DRAM Interface
Authors
김영식박홍준이선규심재윤
Date Issued
2012-02-21
Publisher
IEEE
URI
https://oasis.postech.ac.kr/handle/2014.oak/63112
Article Type
Conference
Citation
IEEE International Solid-State Circuits Conference, page. 136 - 137, 2012-02-21
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박홍준PARK, HONG JUNE
Dept of Electrical Enginrg
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