나노 미터급 MOSFET의 유효 채널 길이 추출 방법에 관한 연구

Abstract

This thesis proposes a method of extracting the effective channel length Leff for nano-scale MOSFETs. This method requires only one MOSFET

therefore, the Leff extraction is not affected either by variation of carrier mobility due to differences in gate length or by changes in MOSFET parameters due to differences in fabrication processes. The method is based on the facts that the gate tunneling current Igb to the substrate depends on Leff, and that the gate tunneling current Igsd to the source and drain depends on the gate-source/drain overlap length delta_L. Curves of Igb and Igsd versus the gate dielectric voltage Vox were obtained from the measured curves of Igb and Igsd versus gate voltage Vg in MOSFETs with different gate length and oxide thickness which were fabricated using a 90 nm CMOS technology. The k = Igb / Igsd was calculated after shifting the Igb - Vox curve along the Vox-axis by delta to correct the measurement errors on VFB,p and NA. After the correction, the variation of k from the average was less than 3.5 % for -1.0 < Vox < -0.6 V. Leff was extracted from the ratio k for a given Vox, which equals the length ratio Leff / delta_L. Except for Marin's method, all previous methods resulted in a non-physical negative delta_L. The drain current Id versus Vd curves calculated using the proposed and Marin's methods were calculated using the Berkeley Short-channel IGFET Model version 4 (BSIM4) and they were compared with the measurements. The comparison shows that the proposed method is much more accurate than the previous ones.