Conference
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 이정수 | - |
| dc.date.accessioned | 2018-06-18T11:19:29Z | - |
| dc.date.available | 2018-06-18T11:19:29Z | - |
| dc.date.created | 2014-08-05 | - |
| dc.date.issued | 2014-02-26 | - |
| dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/67150 | - |
| dc.publisher | 한국반도체학술대회 | - |
| dc.relation.isPartOf | 제21회 한국반도체학술대회 (KCS 2014) | - |
| dc.title | An experimental verification of a scaled RC-dominant interconnect line model for High-speed wireline | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.identifier.bibliographicCitation | 제21회 한국반도체학술대회 (KCS 2014) | - |
| dc.citation.conferenceDate | 2014-02-24 | - |
| dc.citation.conferencePlace | KO | - |
| dc.citation.title | 제21회 한국반도체학술대회 (KCS 2014) | - |
| dc.contributor.affiliatedAuthor | 이정수 | - |
| dc.description.journalClass | 2 | - |
| dc.description.journalClass | 2 | - |
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Related Researcher
- 이정수LEE, JEONG SOO
- Dept of Electrical Enginrg