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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 김재준 | - |
| dc.date.accessioned | 2018-06-19T03:38:27Z | - |
| dc.date.available | 2018-06-19T03:38:27Z | - |
| dc.date.created | 2016-02-28 | - |
| dc.date.issued | 2015-11-04 | - |
| dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/71239 | - |
| dc.publisher | IEEE | - |
| dc.relation.isPartOf | International SoC Design Conference (ISOCC) 2016 | - |
| dc.title | A review of on-chip timing error detection/correction methods for logic pipeline | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.identifier.bibliographicCitation | International SoC Design Conference (ISOCC) 2016 | - |
| dc.citation.title | International SoC Design Conference (ISOCC) 2016 | - |
| dc.contributor.affiliatedAuthor | 김재준 | - |
| dc.description.journalClass | 1 | - |
| dc.description.journalClass | 1 | - |
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Related Researcher
- 김재준KIM, JAE JOON
- Dept. Convergence IT Engineering