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dc.contributor.author김종-
dc.date.accessioned2018-06-21T03:25:06Z-
dc.date.available2018-06-21T03:25:06Z-
dc.date.created2009-03-27-
dc.date.issued2005-05-01-
dc.identifier.urihttps://oasis.postech.ac.kr/handle/2014.oak/73187-
dc.publisherIEEE-
dc.relation.isPartOfIEEE International Symposium on Circuits and Systems (발표논문집)-
dc.relation.isPartOfIEEE International Symposium on Circuits and Systems(발표논문집)-
dc.titleEnergy-saving Design Technique Achieved by Latched Pass-transistor Adiabatic Logic-
dc.typeConference-
dc.type.rimsCONF-
dc.identifier.bibliographicCitationIEEE International Symposium on Circuits and Systems (발표논문집)-
dc.citation.titleIEEE International Symposium on Circuits and Systems (발표논문집)-
dc.contributor.affiliatedAuthor김종-
dc.description.journalClass1-
dc.description.journalClass1-

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김종KIM, JONG
Dept of Computer Science & Enginrg
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