Conference
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 정윤하 | - |
| dc.date.accessioned | 2018-06-21T07:19:51Z | - |
| dc.date.available | 2018-06-21T07:19:51Z | - |
| dc.date.created | 2009-03-27 | - |
| dc.date.issued | 2004-11-03 | - |
| dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/76831 | - |
| dc.publisher | ISNM | - |
| dc.relation.isPartOf | International symposium on nanomanufacturing 2004 | - |
| dc.relation.isPartOf | International symposium on nanomanufacturing 2004 | - |
| dc.title | Parameter extraction and layout optimization for 80 nm RF-NMOS transistors | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.identifier.bibliographicCitation | International symposium on nanomanufacturing 2004, pp.357 - 360 | - |
| dc.citation.conferenceDate | 2004-11-03 | - |
| dc.citation.endPage | 360 | - |
| dc.citation.startPage | 357 | - |
| dc.citation.title | International symposium on nanomanufacturing 2004 | - |
| dc.contributor.affiliatedAuthor | 정윤하 | - |
| dc.description.journalClass | 1 | - |
| dc.description.journalClass | 1 | - |
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Related Researcher
- 정윤하JEONG, YOON HA
- Dept of Electrical Enginrg