10 to 250MHz of Lock Range 0.4um Triple Well CMOS PLL
- Title
- 10 to 250MHz of Lock Range 0.4um Triple Well CMOS PLL
- Authors
- 박홍준
- Date Issued
- 1997-02-01
- Publisher
- 제4회 한국반도체 학술대회
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/81803
- Article Type
- Conference
- Citation
- 제 4회 반도체 학술대회, 1997-02-01
- Files in This Item:
- There are no files associated with this item.
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