Conference
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 홍성제 | - |
| dc.date.accessioned | 2018-06-22T04:06:56Z | - |
| dc.date.available | 2018-06-22T04:06:56Z | - |
| dc.date.created | 2009-03-27 | - |
| dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/87471 | - |
| dc.publisher | SoC Design Technical Society | - |
| dc.relation.isPartOf | 2004 International SoC Design Conference | - |
| dc.relation.isPartOf | 2004 International SoC Design Conference | - |
| dc.title | Latched Pass-transistor Adiabetic Logic | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.identifier.bibliographicCitation | 2004 International SoC Design Conference | - |
| dc.citation.conferenceDate | 2004-10-25 | - |
| dc.citation.title | 2004 International SoC Design Conference | - |
| dc.contributor.affiliatedAuthor | 홍성제 | - |
| dc.description.journalClass | 1 | - |
| dc.description.journalClass | 1 | - |
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- 홍성제HONG, SUNG JE
- Div of IT Convergence Enginrg