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Simulation of nonoverlapped source/drain-to-gate Nano-CMOS for low leakage current

Title
Simulation of nonoverlapped source/drain-to-gate Nano-CMOS for low leakage current
Authors
정윤하
Publisher
IEEK
URI
https://oasis.postech.ac.kr/handle/2014.oak/88191
Article Type
Conference
Citation
IEEK Summer Conference 2006, page. 579 - 580
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정윤하JEONG, YOON HA
Dept of Electrical Enginrg
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