Endurance Enhancement for Phase Change Memory

Abstract

Phase Change Memory (PCM) is limited the number of times each memory cell can be written (endurance problem). This problem is related to process variation when using advanced process technology. However PCM also has many benefits. Wear leveling provides a solution for the endurance problem by dynamically changing physical to logical address mappings. Unlike Flash memory, PCM has fine grained write access. This can result in high computational overhead and large space overhead. As a result, previous wear-leveling approaches use random swapping without any write access information or forego the advantages possible with the used of fine granularly. Unnecessary swapping also frequently occurs. This paper proposes a dynamic wear-leveling solution for PCM with endurance variation. Our method uses Bloom filter technique to reduce space overhead of write traffic without loss of granularity. Although cold addresses can be classified as hot addresses when using a Bloom filter (false positive problem), heuristic methods are used to reduce this effect. By using a small portion of the PCM space overhead (0.3%), the proposed method extends the lifetime of a PCM device by 2.8~4.6 times over the existing random write leveling methods.