A Study on Linear Wideband Low-Noise Amplifier and Ultra-Low Power Multi-Output DC-DC Converter

Abstract

As wireless communication technology advances, new advanced wireless communication standards have emerged into our daily life. They require not only high mobility for the user's convenience but also wide channel bandwidth to process a large amount of data. One example of the most common broadband RF receiver is a TV tuner system. These days, people want to use mobile TV service everywhere with good audio and video quality, so the TV tuner receiver progresses to higher mobility. Due to these demands, TV tuner using silicon integrated circuit (IC) type has been actively researched. The silicon tuner is a low cost solution for manufacturing than the can-type tuner and does not require any extra tuning after fabrication. Moreover, size of the silicon tuner is much smaller than that of the can-type tuner, so it is suitable for mobile device.

Mobile TV tuner receiver should cover a very wide frequency range over 54 ~ 870 MHz where many adjacent channels are included. Therefore, we need a receiver system with high linearity. Especially, the linearity of the wideband LNA which is placed in front of the mobile TV receiver system is very important to escape from the intermodulation of unwanted interference signals. Hereupon, we propose a wideband noise-canceling LNA with the second and third order intermodulation distortion (IMD2 and IMD3) canceling technique in this dissertation. Based on the known noise cancellation mechanism, the proposed LNA cancels IMD3 by adopting not the noise-canceling point but the IMD3-canceling point. Also, IMD2 is cancelled by the complementary CMOS parallel push-pull structure. Finally, the LNA implemented in a 65 nm CMOS process delivers an IIP2 of 25 dBm, an IIP3 of 5.5 dBm with a power gain of 13 dB and an noise figure of 2.1 ~ 3.5 dB in a frequency range from 0.1 to 1.6 GHz. The total power dissipation is 20.8 mW at 1.2 V and the chip area is only 0.014 mm2.

Interestingly, this dissertation deals with another topic of power management integrated circuit (PMIC) for ultra-low power (ULP) wireless sensor network (WSN). For recent years, there has been a huge attention to ULP WSN applications, which span from short-range machine-to-machine (M2M) communication (wireless personal area network (WPAN)) to medical sensor network around the human body (wireless body area network (WBAN)). As ULP radios consume very small amounts of energy in such networks, ~ mW in WPAN and ~uW in WBAN, smart wireless sensors with small and flexible battery have been realized.

As of today's battery technology, Lithium-ion (Li-ion) batteries are regarded as the most practical energy source for WSN applications, thanks to their high energy density and low memory effect. However, cell voltage of Li-ion batteries is high and also varies (3.0 ~ 4.2 V) depending on the stored charge, so a power management unit (PMU) is necessary to bring the wide range of the source voltage down to stable supply voltage for RF and baseband circuits. Besides, the building blocks of sensors may require different supply voltages to operate in low power. As the power consumption of wireless radios has been reduced, energy-efficiency of the PMU has become more important. This thesis discusses a novel inductor-based DC-DC buck converter for ULP sensor node applications which achieves good efficiency (64%) even at very light load (5 uW) and supplies multiple regulated outputs using a single shared inductor. Pulse skipping modulation (PSM) is utilized to increase the efficiency at a light load and to regulate multiple outputs with a single inductor. A low quiescent current of 650 nA is measured by the proposed leakage-based oscillator and the power-gated zero current detector with adaptive offset control technique. The peak efficiency is 88.5% at 800 uW, and the range of the output voltage is 0.6 ~ 1.6 V. This system is implemented in a TSMC 65 nm CMOS process.