DC Field | Value | Language |
---|---|---|
dc.contributor.author | 최준용 | - |
dc.date.accessioned | 2018-10-17T05:37:03Z | - |
dc.date.available | 2018-10-17T05:37:03Z | - |
dc.date.issued | 2017 | - |
dc.identifier.other | OAK-2015-07726 | - |
dc.identifier.uri | http://postech.dcollection.net/jsp/common/DcLoOrgPer.jsp?sItemId=000002330199 | ko_KR |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/93412 | - |
dc.description | Master | - |
dc.description.abstract | We simulated polysilicon nanowire tunneling field-effect transistors (poly-Si NW TFETs) for ultra-low power applications. DC characteristics (threshold voltage(Vth), ambipolar effect, on-current(Ion)) of poly-Si NW TFETs were investigated when a single grain boundary (SGB) existed in the channel region. Poly-Si NW TFETs were analyzed using 3-D numerical simulations in terms of different locations and sizes of the SGB. As the SGB was closer to the source/channel junction, longer source-side tunneling path increased Vth but decreased Ion because the captured electrons at the acceptor-like states in the SGB shift conduction band upward at on-state condition. On the other hand, as the SGB was closer to the channel/drain junction, longer drain-side tunneling path decreased ambipolar effect because the captured holes at the donor-like states in the SGB shift valence band downward at reverse-bias condition. In addition, the wider SGBs at the source/channel and the channel/drain junctions induced the longer tunneling path, and increased Vth and decreased Ion and ambipolar effect at on-state and reverse bias conditions, respectively. | - |
dc.language | kor | - |
dc.publisher | 포항공과대학교 | - |
dc.title | Investigation of DC Characteristics in Polysilicon Nanowire Tunneling Field-Effect Transistors | - |
dc.title.alternative | 폴리실리콘 나노선기반 터널링 전계효과 트랜지스터의 DC 특성 분석 | - |
dc.type | Thesis | - |
dc.contributor.college | 일반대학원 창의IT융합공학과 | - |
dc.date.degree | 2017- 2 | - |
dc.type.docType | Thesis | - |
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