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Hardware implementation of neural network using pre-programmed resistive device for pattern recognition SCIE SCOPUS

Title
Hardware implementation of neural network using pre-programmed resistive device for pattern recognition
Authors
CHOI, WOOOSEOK문기봉곽명훈SUNG, CHANG HYUCKLEEJONGWONSONG, JEONG HWANPark, JaesungChekol, Solomon AmsaluHwang, Hyunsang
Date Issued
2019-03
Publisher
PERGAMON-ELSEVIER SCIENCE LTD
Abstract
To achieve high pattern recognition accuracy by using an analog input voltage scheme, we have confirmed that the conductance linearity (CL), conductance uniformity (CU) and multi-levels conductance (MLC) characteristics are the key factors for synapse devices. We analyze the CL, CU and MLC characteristics of WOx-based resistive device (RD) for hardware neural network applications. Our findings show that excellent CL of RD is achieved by engineering the WOx composition and Schottky barrier height. Further, by adjusting top electrode materials, the RD exhibits improved CU due to the uniform W-WO(x )contact leading to discrete MLC states of RD with varying the device area. Finally, we have successfully demonstrated the potential of WOx-based RD for synapse application of hardware inference system through neural network simulation and the hardware implementation.
URI
https://oasis.postech.ac.kr/handle/2014.oak/95278
DOI
10.1016/j.sse.2018.12.018
ISSN
0038-1101
Article Type
Article
Citation
SOLID-STATE ELECTRONICS, vol. 153, page. 79 - 83, 2019-03
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