A Study on Bandgap Reference Circuit With Leakage-Based PTAT Generation

Abstract

This paper presents detailed analyses on leakage-based bandgap reference (BGR) circuit for ultralow-power applications. Design considerations for power supply rejection ratio and noise characteristics are provided with pole/zero analysis. Startup settling issue is also discussed with measurements. For verification, a test BGR circuit is implemented in a 0.18-mu m CMOS technology. The standard deviation of proportional-toabsolute-temperature (PTAT) voltages measured from 20 chips is 1.15% at 30 degrees C. The BGR also uses two PTAT voltages to reduce the resistance for complementary-to-absolute-temperature generation, hence alleviating the tradeoff limitation between power consumption and area cost. With an active area of 0.056 mm(2), the BGR consumes 19 nW at room temperature. Measurements from 20 chips show a standard deviation of 0.54% at 30 degrees C without any trimming, a temperature dependence of 143 ppm/degrees C and a line regulation of 2.4%/V.