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A low-power LDO circuit with a fast load regulation SCOPUS
- Title
- A low-power LDO circuit with a fast load regulation
- Authors
- Jang, Y.-J.; Cho, S.-E.; Kim, B.; Sim, J.-Y.; Park, H.-J.
- Date Issued
- 2017-01
- Publisher
- Institute of Electrical and Electronics Engineers Inc.
- Abstract
- By adding a Miller frequency compensation to the conventional LDO circuit that combines the super source follower and the voltage spike detection, a low-power LDO circuit is proposed to drive the load capacitance up to 10 pF with a fast load regulation. The LDO circuit converts a 5 V input to a 3.3V output, consumes 26 ��A, and settles in 75 ns at a 10 mA load current step in 1ns. ? 2016 IEEE.
- Article Type
- Article
- Citation
- 2016 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2016, page. 47 - 49, 2017-01
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- 김병섭KIM, BYUNGSUB
- Dept of Electrical Enginrg