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Showing results 348 to 367 of 406

Article

Segmented group-inversion coding for parallel linksSCIESCOPUS

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, vol. 54, no. 4, page. 328 - 332, 2007-04

Sim, JY

Conference

Serpentine guard trace to reduce far-end crosstalk and even-odd mode velocity mismatch of microstrip lines by more than 40%

Electronic Components and Technology Conference, page. 329 - 332, 2007-05-29

Article

Serpentine Microstrip Lines With Zero Far-End Crosstalk for Parallel High-Speed DRAM InterfacesSCIESCOPUS

IEEE TRANSACTIONS ON ADVANCED PACKAGING, vol. 33, no. 2, page. 552 - 558, 2010-05

Conference

Single-Stage 40dB-Linear Digitally-Controlled Variable Gain Amplifier for Ultrasound Analog Front End

제21회 한국반도체학술대회, 2014-02-25

Article

Smart Wireless Near-Infrared Light Emitting Contact Lens for the Treatment of Diabetic RetinopathySCIESCOPUS

Advanced Science, vol. 9, no. 9, 2022-03

Conference

Time-Interleaved Sample Clock Generator for Ultrasound Beamformer Application

International SoC Design Conference, page. 290 - 293, 2011-11-18

Conference

Time-Interleaved Sample Clock Generator for Ultrasound Beamformer Application

IEEE International SoC Design Conference(ISOCC2011), 2011-11-17

Article

Toward sustainable output generation of liquid-solid contact triboelectric nanogenerators: The role of hierarchical structuresSCIESCOPUS

Nano Energy, vol. 56, page. 56 - 64, 2019-02

Conference

Two-coupled 마이크로스트립 라인의 SPICE RLGC 파라미터 추출

2010 SoC학술대회, 2010-05-01

Conference

Two-coupled 마이크로스트립 라인의 SPICE RLGC 파라미터 추출

대한전자공학회 SoC 학술대회, 2010-05-01

Conference

TX Digital Circuit for USB 2.0 PHY High Speed Interface

2010 International Conference on Electronics, Information, and Communication, 2010-07-01

Conference

USB 2.0 high-speed PHY interface를 위한 전송선의 Verilog modeling

2014년 SoC 학술대회, 2014-05-17

Conference

USB 2.0 high-speed PHY interface를 위한 전송선의 Verilog modeling

2014 SoC 학술대회, 2014-05-17

Conference

USB 2.0 high-speed PHY interface를 위한 전송선의 Verilog modeling

대한전자공학회 SoC 학술대회, 2014-05-17

Conference

USB 2.0 Protocol Layer의 FPGA 구현과 검증

2011 대한전자공학회 하계종합학술대회, 2011-06-24

Conference

USB 2.0 Protocol Layer의 FPGA 구현과 검증

대한전자공학회 하계종합학술대회, page. 376 - 379, 2011-06-24

Conference

USB2.0 용 All-synthesizable 저 전력 전압모드 송신기 구동회로

대한전자공학회 2018 정기총회 및 추계학술대회, 2018-11-23

Conference

USB2.0 용 All-synthesizable 저 전력 전압모드 송신기 구동회로

대한전자공학회 2018 정기총회 및 추계학술대회, 2018-11-23

Conference

Verilog Design of Asynchronous Clock Domain Crossing Techniques in High Speed Digital Transceiver Circuits

ITC-CSCC, 2011-06-22

Conference

Verilog Design of Asynchronous Clock Domain Crossing Techniques in High Speed Digital Transceiver Circuits

International Technical Conference on Circuits/Systems, Computers and Communications, 2011-06-22

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