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Conference

Time-Interleaved Sample Clock Generator for Ultrasound Beamformer Application

International SoC Design Conference, page. 290 - 293, 2011-11-18

Conference

Time-Interleaved Sample Clock Generator for Ultrasound Beamformer Application

IEEE International SoC Design Conference(ISOCC2011), 2011-11-17

Article

Toward sustainable output generation of liquid-solid contact triboelectric nanogenerators: The role of hierarchical structuresSCIESCOPUS

Nano Energy, vol. 56, page. 56 - 64, 2019-02

Conference

Two-coupled 마이크로스트립 라인의 SPICE RLGC 파라미터 추출

2010 SoC학술대회, 2010-05-01

Conference

Two-coupled 마이크로스트립 라인의 SPICE RLGC 파라미터 추출

대한전자공학회 SoC 학술대회, 2010-05-01

Conference

TX Digital Circuit for USB 2.0 PHY High Speed Interface

2010 International Conference on Electronics, Information, and Communication, 2010-07-01

Conference

USB 2.0 high-speed PHY interface를 위한 전송선의 Verilog modeling

2014년 SoC 학술대회, 2014-05-17

Conference

USB 2.0 high-speed PHY interface를 위한 전송선의 Verilog modeling

2014 SoC 학술대회, 2014-05-17

Conference

USB 2.0 high-speed PHY interface를 위한 전송선의 Verilog modeling

대한전자공학회 SoC 학술대회, 2014-05-17

Conference

USB 2.0 Protocol Layer의 FPGA 구현과 검증

2011 대한전자공학회 하계종합학술대회, 2011-06-24

Conference

USB 2.0 Protocol Layer의 FPGA 구현과 검증

대한전자공학회 하계종합학술대회, page. 376 - 379, 2011-06-24

Conference

USB2.0 용 All-synthesizable 저 전력 전압모드 송신기 구동회로

대한전자공학회 2018 정기총회 및 추계학술대회, 2018-11-23

Conference

USB2.0 용 All-synthesizable 저 전력 전압모드 송신기 구동회로

대한전자공학회 2018 정기총회 및 추계학술대회, 2018-11-23

Conference

Verilog Design of Asynchronous Clock Domain Crossing Techniques in High Speed Digital Transceiver Circuits

ITC-CSCC, 2011-06-22

Conference

Verilog Design of Asynchronous Clock Domain Crossing Techniques in High Speed Digital Transceiver Circuits

International Technical Conference on Circuits/Systems, Computers and Communications, 2011-06-22

Article

Verilog Modeling of Transmission Line for USB 2.0 High-Speed PHY InterfaceSCIESCOPUS

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, vol. 14, no. 4, page. 463 - 470, 2014-08

Conference

Verilog Synthesis of USB 2.0 Full-speed Device PHY IP

International SoC Design Conference, 2013-11-19

Conference

Verilog Synthesis of USB 2.0 Full-speed Device PHY IP

International SoC Design Conference, 2013-11-19

Conference

Verilog를 이용한 USB Serial Interface Engine 설계

대한전자공학회 연합학술대회, 2010-10-21

Conference

Voltage-Scalable 10-b Pipelined ADC with Current-Mode Amplifier

IEEE Custom Integrated Circuits Conference (CICC), 2014-09-16

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