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Showing results 1240 to 1259 of 106,957
Conference
A Facile Strategy for Fabricating 3-Dimensional Electrospun Fiber Scaffold for Tissue Engineering

2013년 한국고분자학회 추계학술대회, 2013-10-11

Conference
A new phosphoinositide specific phospholipase C isozyme from bovine pancreas

1991 Spring Scientific Meeting for Biochem. Soc. ROK, 1991-05-03

Conference
A new phosphoinositide specific phospholipase C isozyme from bovine pancreas

1991 Spring Scientific Meeting for Biochem., 1991-05-03

Conference
A Selective Normalized Subband Adaptive Filter Exploiting an Efficient Subset of Subband

19th European Signal Processing Conference (EUSIPCO 2011), 2011-08-29

Article
A "Reactive" Ratiometric Fluorescent Probe for Mercury SpeciesSCIESCOPUS

ORGANIC LETTERS, vol. 13, no. 13, page. 3422 - 3425, 2011-07-01

Conference
A 'Composite' Stepped Plate for Use in Highly Directional Parametric Array Loudspeakers

Acoustics '17 Boston, 2017-06-29

Article
A 'turn-on' fluorescent probe that selectively responds to inorganic mercury speciesSCIESCOPUS

TETRAHEDRON LETTERS, vol. 51, no. 29, page. 3852 - 3854, 2010-07-21

Article
A 0.0043-mm(2) 0.3-1.2-V Frequency-Scalable Synthesized Fractional-N Digital PLL With a Speculative Dual-Referenced Interpolating TDCSCIESCOPUS

IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 54, no. 1, page. 99 - 108, 2019-01

Conference
A 0.0047mm2 Highly Synthesizable TDC and DCO-less Fractional-NPLL with a Seamless Lock - Range off RER to 1GHz

IEEE International Solid-State Circuits Conference, 2017-02-07

Conference
A 0.0047mm2 Highly Synthesizable TDC and DCO-less Fractional-NPLL with a Seamless Lock - Range off RER to 1GHz

IEEE International Solid-State Circuits Conference (ISSCC), 2017-02-07

Conference
A 0.0047mm2 Highly Synthesizable TDC- and DCO-Less Fractional-N PLL with a Seamless Lock Range of fREF to 1GHz

IEEE International Solid-State Circuits Conference, 2017-02-05

Conference
A 0.1-fref BW 1GHz Fractional-N PLL with FIR-Embedded Phase-Interpolator-Based Noise Filtering

IEEE International Solid-State Circuits Conference, page. 94 - 95, 2011-02-21

Conference
A 0.1-fref BW 1GHz fractional-N PLL with FIR-embedded phase-interpolator-based noise filtering

ISSCC 2011, 2011-02-20

Article
A 0.12GHz-1.4GHz DLL-based clock generator with a multiplied 4-phase clock using a 0.18um CMOS process

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, vol. 6, no. 4, page. 264 - 269, 2006-12

Conference
A 0.12GHz-1.4GHz DLL-based clock generator with a multiplied 4-phase clock using a 0.18um CMOS process

International SoC Design Conference, page. 241 - 244, 2006-10-01

Conference
A 0.13-μm CMOS Multi-Divider for 100 MHz ~ 1 GHz Frequency Synthesizer

대한전자공학회 2010 하계종합학술대회, 2010-06-16

Conference
A 0.18-um CMOS switch with high isolation for 48 MHz ~ 860 MHz TV tuner application

대한전자공학회 2009 하계종합학술대회, 2009-07-08

Conference
A 0.3 mm 2 Miniaturized X-Band On-Chip Slot Antenna in 0.13μm CMOS

Radio Frequency Integrated Circuits (RFIC) Symposium, 2007 IEEE, 2007-07-02

Conference
A 0.3-to-1.2V frequency-scalable fractional-N ADPLL with a speculative dual-referenced interpolating TDC

IEEE International Solid-State Circuits Conference, 2018-02-13

Conference
A 0.3-to-1.2V Frequency-Scalable Fractional-N ADPLLwith a Speculative Dual-Referenced Interpolating TDC

EEE International Solid-State Circuits Conference (ISSCC), 2018-02-13

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