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dc.contributor.authorBAEK, ROCK HYUN-
dc.contributor.authorLEE, JUNJONG-
dc.contributor.authorSEUNGHWAN, LEE-
dc.contributor.authorJINSU, JEONG-
dc.contributor.authorYOON, JUN SIK-
dc.date.accessioned2020-01-06T04:50:28Z-
dc.date.available2020-01-06T04:50:28Z-
dc.date.created2020-01-06-
dc.date.issued2020-02-14-
dc.identifier.urihttps://oasis.postech.ac.kr/handle/2014.oak/100684-
dc.publisher제 27회 반도체학술대회-
dc.relation.isPartOf제 27회 반도체학술대회-
dc.relation.isPartOf제 27회 반도체학술대회-
dc.titlePower, Performance and Area Analysis of Source/Drain Patterning n/p FinFETs based 6T-SRAM cell for 3-nm technology node-
dc.typeConference-
dc.type.rimsCONF-
dc.identifier.bibliographicCitation제 27회 반도체학술대회-
dc.citation.conferenceDate2020-02-12-
dc.citation.conferencePlaceKO-
dc.citation.title제 27회 반도체학술대회-
dc.contributor.affiliatedAuthorBAEK, ROCK HYUN-
dc.contributor.affiliatedAuthorLEE, JUNJONG-
dc.contributor.affiliatedAuthorSEUNGHWAN, LEE-
dc.contributor.affiliatedAuthorJINSU, JEONG-
dc.contributor.affiliatedAuthorYOON, JUN SIK-
dc.description.journalClass2-
dc.description.journalClass2-

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백록현BAEK, ROCK HYUN
Dept of Electrical Enginrg
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