Analog CMOS-based Resistive Processing Unit for Deep Neural Network Training
- Title
- Analog CMOS-based Resistive Processing Unit for Deep Neural Network Training
- Authors
- KIM, SEYOUNG
- Date Issued
- 2017-08-08
- Publisher
- Institute of Electrical and Electronics Engineers
- Abstract
- Recently we have shown that an architecture based on resistive processing unit (RPU) devices has potential to achieve significant acceleration in deep neural network (DNN) training compared to today's software-based DNN implementations running on CPU/GPU. However, currently available device candidates based on non-volatile memory technologies do not satisfy all the requirements to realize the RPU concept. Here, we propose an analog CMOS-based RPU design (CMOS RPU) which can store and process data locally and can be operated in a massively parallel manner. We analyze various properties of the CMOS RPU to evaluate the functionality and feasibility for acceleration of DNN training.
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/103420
- Article Type
- Conference
- Citation
- 2017 IEEE 60th International Midwest Symposium on Circuits and Systems, 2017-08-08
- Files in This Item:
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