Analysis of 2-terminal Thyristor-based Random Access Memory (T-RAM) Characteristics for Scaling and Data Retention

Abstract

2 terminal thyristor random-access memory (T RAM) is investigated in terms of doping concentrations in the storage region to improve scalability and data retention time. When doping concentrations of N and P storage region are equal to each other at 1018 cm-3, T-RAM exhibits the highest retention time of 100 msec. In addition, it is proposed how to set the standby voltage in an energy-effective way. This standby voltage allows steady data retention of T-RAM with femto-scale leakage current until the erase operation is applied. Consequently, the proposed guideline can give a pathway to realize 2 terminal T-RAM as a promising capacitor-less DRAM technology.