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Mapping Binary ResNets on Computing-In-Memory Hardware with Low-bit ADCs

Title
Mapping Binary ResNets on Computing-In-Memory Hardware with Low-bit ADCs
Authors
Kim, YulhwaKim, HyungjunPark, JihoonOh, HyunmyungKim, Jae-Joon
Date Issued
2021-02-03
Publisher
Institute of Electrical and Electronics Engineers Inc.
Abstract
Implementing binary neural networks (BNNs) on computing-in-memory (CIM) hardware has several attractive features such as small memory requirement and minimal overhead in peripheral circuits such as analog-to-digital converters (ADCs). On the other hand, one of the downsides of using BNNs is that it degrades the classification accuracy. Recently, ResNet-style BNNs are gaining popularity with higher accuracy than conventional BNNs. The accuracy improvement comes from the high-resolution skip connection which binary ResNets use to compensate the information loss caused by binarization. However, the high-resolution skip connection forces the CIM hardware to use high-bit ADCs again so that area and energy overhead becomes larger. In this paper, we demonstrate that binary ResNets can be also mapped on CIM with low-bit ADCs via aggressive partial sum quantization and input-splitting combined with retraining. As a result, the key advantages of BNN CIM such as small area and energy consumption can be preserved with higher accuracy.
URI
https://oasis.postech.ac.kr/handle/2014.oak/112804
Article Type
Conference
Citation
2021 Design, Automation and Test in Europe Conference and Exhibition, DATE 2021, page. 856 - 861, 2021-02-03
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