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Process for 20 nm T gate on Al0.25Ga0.75As/In0.2Ga0.8As/GaAs epilayer using two-step lithography and zigzag foot SCIE SCOPUS

Title
Process for 20 nm T gate on Al0.25Ga0.75As/In0.2Ga0.8As/GaAs epilayer using two-step lithography and zigzag foot
Authors
Lee, KSKim, YSLee, KTJeong, YH
Date Issued
2006-07
Publisher
A V S AMER INST PHYSICS
Abstract
After metallization, a 20 nm T gate with a straight foot is not mechanically stable because the support given by the foot is too weak. We have proposed a zigzag gate foot to enhance mechanical support and developed a process using two-step electron beam lithography and zigzag foot shape to fabricate 20 nm T gates for high performance Al0.25Ga0.75As/In0.2Ga0.8As/GaAs modulation-doped field-effect transistors. Two-step lithography reduces electron forward scattering by defining the foot on a thin (40 nm) bottom layer of polymethyl methacrylate at the second step, the T-gate head having been developed at the first step. Adopting a low temperature development technique for the second step reduces the detrimental effect of head exposure on foot definition. With this process, stand-alone 20 nm zigzag T gates have been successfully fabricated on an Al0.25Ga0.75As/In0.2Ga0.8As/GaAs epitaxial wafer using a 20 keV electron beam. With a higher-voltage electron beam, this process can be used to fabricate sub-20-nm T gates. (c) 2006 American Vacuum Society.
URI
https://oasis.postech.ac.kr/handle/2014.oak/11285
DOI
10.1116/1.2218871
ISSN
1071-1023
Article Type
Article
Citation
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, vol. 24, no. 4, page. 1869 - 1872, 2006-07
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정윤하JEONG, YOON HA
Dept of Electrical Enginrg
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