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A Comparative Study of the DRAM Leakage Mechanism for Planar and Recessed Channel MOSFETs SCIE SCOPUS

Title
A Comparative Study of the DRAM Leakage Mechanism for Planar and Recessed Channel MOSFETs
Authors
Lee, MJBaek, CKPark, SChung, IYPark, YJ
Date Issued
2009-09
Publisher
Elsevier
Abstract
We have experimentally analyzed the leakage mechanism by comparing the planar DRAM cell and the recently developed DRAM cell transistors that have deeply recessed channels. We have identified important differences in the leakage mechanisms between planar MOSFETs and recessed channel MOSFETs, so we can suggest guidelines with respect to the optimal device structures for the recessed channel DRAM cell. (C) 2009 Elsevier Ltd. All rights reserved.
Keywords
Dynamic random access memory (DRAM); Recessed channel array transistor (RCAT); Leakage current; CELL TRANSISTOR
URI
https://oasis.postech.ac.kr/handle/2014.oak/13715
DOI
10.1016/J.SSE.2009.04.011
ISSN
0038-1101
Article Type
Article
Citation
SOLID-STATE ELECTRONICS, vol. 53, no. 9, page. 998 - 1000, 2009-09
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