Current-Mode Transceiver for Silicon Interposer Channel
SCIE
SCOPUS
- Title
- Current-Mode Transceiver for Silicon Interposer Channel
- Authors
- Lee, SH; Lee, SK; Kim, B; Park, HJ; Sim, JY
- Date Issued
- 2014-09
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Abstract
- An energy-efficient 3 Gb/s current-mode interface scheme is proposed for on-chip global interconnects and silicon interposer channels. The transceiver core consists of an open-drain transmitter with one-tap pre-emphasis and a current sense amplifier load as the receiver. The current sense amplifier load is formed by stacking a PMOS diode stage and a cross-coupled NMOS stage, providing an optimum current-mode receiver without any bias current. The proposed scheme is verified with two cases of transceivers implemented in 65 nm CMOS. A 10 mm point-to-point data-only channel shows an energy efficiency of 9.5 fJ/b/mm, and a 20 mm four-drop source-synchronous link achieves 29.4 fJ/b/mm including clock and data channels.
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/13814
- DOI
- 10.1109/JSSC.2014.2336213
- ISSN
- 0018-9200
- Article Type
- Article
- Citation
- IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 49, no. 9, page. 2044 - 2053, 2014-09
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