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dc.contributor.author백동훈en_US
dc.date.accessioned2014-12-01T11:49:15Z-
dc.date.available2014-12-01T11:49:15Z-
dc.date.issued2014en_US
dc.identifier.otherOAK-2014-01688en_US
dc.identifier.urihttp://postech.dcollection.net/jsp/common/DcLoOrgPer.jsp?sItemId=000001677274en_US
dc.identifier.urihttps://oasis.postech.ac.kr/handle/2014.oak/2190-
dc.descriptionMasteren_US
dc.description.abstractThis paper presents a DLL-based reference-less CDR for intra-panel interface. With a pattern-dependent clock-embedded signaling, the clock information is carried with only one bit added to each data packet. The CDR, implemented in 65nm CMOS, shows a lock range of 6.5-to-9Gb/s and a power efficiency of 0.63mW/Gb/s at 9Gb/s.en_US
dc.languagekoren_US
dc.publisher포항공과대학교en_US
dc.rightsBY_NC_NDen_US
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/2.0/kren_US
dc.titleA Study on DLL-Based Reference-less CDRen_US
dc.typeThesisen_US
dc.contributor.college일반대학원 전자전기공학과en_US
dc.date.degree2014- 2en_US
dc.type.docTypeThesis-

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