This paper presents a DLL-based reference-less CDR for intra-panel interface. With a pattern-dependent clock-embedded signaling, the clock information is carried with only one bit added to each data packet. The CDR, implemented in 65nm CMOS, shows a lock range of 6.5-to-9Gb/s and a power efficiency of 0.63mW/Gb/s at 9Gb/s.