Effect of plasma process-induced damage on bias temperature instability of MOSFETs
SCIE
SCOPUS
- Title
- Effect of plasma process-induced damage on bias temperature instability of MOSFETs
- Authors
- Jang, TS; Ha, MH; Yoo, KD; Kang, BK
- Date Issued
- 2006-03
- Publisher
- ELSEVIER SCIENCE BV
- Abstract
- For a surface-channel n-MOSFET and a buried-channel p-MOSFET, the effect of plasma process-induced damage oil bias temperature instability (BTI) was investigated. The gate oxide thickness, t(ox), of the test MOSFETs was 2.0, 3.0, or 4.5 nm. The shifts of threshold voltage V-th and of linear drain current I-JIin were measured after applying a BTI stress at a temperature of 125 degrees C. The measured shifts of V-th and I-dIin indicate that BTI oil ultra-thin gate CMOS devices appears only in the form of SiO2/Si interface degradation, and that the positive BTI for the n-MOSFET as well as the negative BTI for the p-MOSFET is important for the reliability evaluation of CMOS devices. Because of positive plasma charging to the gate, a protection diode was very efficient at reducing BTI for the p-MOSFET, but it was much less effective for the n-MOSFET. (c) 2005 Elsevier B.V. All rights reserved.
- Keywords
- gate oxide integrity; bias temperature instability; plasma process-induced damage; interface state degradation; latent plasma process-induced damage
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/24121
- DOI
- 10.1016/j.mee.2005.11.004
- ISSN
- 0167-9317
- Article Type
- Article
- Citation
- MICROELECTRONIC ENGINEERING, vol. 83, no. 3, page. 415 - 422, 2006-03
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- There are no files associated with this item.
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