Highly Enhanced Performance of Network-Channel Polysilicon Thin-Film Transistors
SCIE
SCOPUS
- Title
- Highly Enhanced Performance of Network-Channel Polysilicon Thin-Film Transistors
- Authors
- Lee, H; Lee, J; Baek, S; Jeong, W.H; Lee, Y; Yang, T; Lee, J.-S.
- Date Issued
- 2016-12
- Publisher
- IEEE
- Abstract
- This letter presents the electrical characteristics of newly proposed network-channel low-temperature polysilicon channel (LTPS) thin-film transistors (TFTs). Due to effective reduction of grain boundary traps and enhanced gate controllability, the network-channel TFTs show better subthreshold slope, lower threshold voltage, and higher ON- OFF current ratio, compared with conventional planar devices. The extracted grain boundary trap density and the interface trap density are significantly reduced in the network-channel devices. In addition, the network-channel devices show higher immunity to hot-carrier stressing, which are confirmed from the low-frequency noise characteristics with various stressing time. These results suggest that the network-channel devices are very promising for next-generation LTPS TFT applications.
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/36646
- DOI
- 10.1109/LED.2016.2636924
- ISSN
- 0741-3106
- Article Type
- Article
- Citation
- IEEE Electron Device Letters, no. 99, 2016-12
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- There are no files associated with this item.
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