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Article
Investigation of RC Parasitics Considering Middle-of-the-Line in Si-Bulk FinFETs for Sub-14-nm Node Logic ApplicationsSCIESCOPUS

IEEE TRANSACTIONS ON ELECTRON DEVICES, vol. 62, no. 10, page. 3441 - 3444, 2015-10

Article
Junction Design Strategy for Si Bulk FinFETs for System-on-Chip Applications Down to the 7-nm NodeSCIESCOPUS

IEEE ELECTRON DEVICE LETTERS, vol. 36, no. 10, page. 994 - 996, 2015-10

Article
Process-Induced Variations of 10-nm Node Bulk nFinFETs Considering Middle-of-Line ParasiticsSCIESCOPUS

IEEE Transactions on Electron Devices, vol. 63, no. 9, page. 3399 - 3405, 2016-09

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