Improved Conductance Linearity and Conductance Ratio of 1T2R Synapse Device for Neuromorphic Systems
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SCOPUS
- Title
- Improved Conductance Linearity and Conductance Ratio of 1T2R Synapse Device for Neuromorphic Systems
- Authors
- Moon, Kibong; Kwak, Myounghoon; Park, Jaesung; Lee, Dongwook; Hwang, Hyunsang
- Date Issued
- 2017-08
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Abstract
- We report on a 1-transisor/2-resistor (1T2R) synapse device with improved conductance linearity and conductance ratio under an identical pulse condition for hardware neural networks with high pattern-recognition accuracy. Utilizing an additional series-connected resistor, the conductance linearity of a synapse device was significantly improved owing to the reduced initial voltage drop on an resistive RAM (RRAM) device during depression conditions. Moreover, to maximize the conductance ratio of a synapse device, we utilized a steep subthreshold region of an MOSFET by a parallel connection of an RRAM and a transistor. A small change in voltage on the RRAM directly controlled the gate bias of the MOSFET, which causes a large change in the drain current. Compared with a conventional RRAM synapse device, the 1T2R synapse device shows an improved conductance linearity and conductance ratio (>x100). Finally, we confirmed an excellent classification accuracy by using a neural network simulation based on a multilayer perceptron.
- Keywords
- Analog memory; linearity; neuromorphic; PCMO; RRAM; resistive switching; synapse device
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/50595
- DOI
- 10.1109/LED.2017.2721638
- ISSN
- 0741-3106
- Article Type
- Article
- Citation
- IEEE ELECTRON DEVICE LETTERS, vol. 38, no. 8, page. 1023 - 1026, 2017-08
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- There are no files associated with this item.
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