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Modeling SRAM Failure Rates to Enable Fast, Dense, Low-Power Caches

Title
Modeling SRAM Failure Rates to Enable Fast, Dense, Low-Power Caches
Authors
김장우
Date Issued
2009-03-25
Publisher
IEEE
URI
https://oasis.postech.ac.kr/handle/2014.oak/56879
Article Type
Conference
Citation
IEEE Workshop On Silicon Error in Logic - System Effects, 2009-03-25
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김장우KIM, JANGWOO
Dept of Computer Science & Enginrg
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