Conference
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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 김영환 | - |
| dc.contributor.author | 권현정 | - |
| dc.contributor.author | 박해성 | - |
| dc.contributor.author | 김진욱 | - |
| dc.date.accessioned | 2018-06-19T03:51:53Z | - |
| dc.date.available | 2018-06-19T03:51:53Z | - |
| dc.date.created | 2016-02-29 | - |
| dc.date.issued | 2015-05-16 | - |
| dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/71461 | - |
| dc.publisher | 대한전자공학회 | - |
| dc.relation.isPartOf | 대한전자공학회 SoC 설계연구회학술발표회 | - |
| dc.relation.isPartOf | 대한전자공학회 SOC 설계연구회학술발표회 | - |
| dc.title | Hybrid gate-level 누설 전류 모델의 gate library characterization에 적합한 error metric | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.identifier.bibliographicCitation | 대한전자공학회 SoC 설계연구회학술발표회 | - |
| dc.citation.conferenceDate | 2015-05-16 | - |
| dc.citation.conferencePlace | KO | - |
| dc.citation.title | 대한전자공학회 SoC 설계연구회학술발표회 | - |
| dc.contributor.affiliatedAuthor | 김영환 | - |
| dc.contributor.affiliatedAuthor | 권현정 | - |
| dc.contributor.affiliatedAuthor | 박해성 | - |
| dc.description.journalClass | 2 | - |
| dc.description.journalClass | 2 | - |
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Related Researcher
- 김영환KIM, YOUNG HWAN
- Dept of Electrical Enginrg