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Browsing by  AuthorShin, Youngsoo

전체 가 나 다 라 마 바 사 아 자 차 카 타 파 하
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Article
Synthesis of Dual-Mode Circuits Through Library Design, Gate Sizing, and Clock-Tree OptimizationSCIESCOPUS

ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, vol. 21, no. 3, 2016-07

Article
Wakeup scheduling and its buffered tree synthesis for power gating circuitsSCIESCOPUS

INTEGRATION-THE VLSI JOURNAL, vol. 53, no. C, page. 157 - 170, 2016-03

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