Characterization and Modeling of 1/f Noise in Si-nanowire FETs: Effects of Cylindrical Geometry and Different Processing of Oxides
SCIE
SCOPUS
- Title
- Characterization and Modeling of 1/f Noise in Si-nanowire FETs: Effects of Cylindrical Geometry and Different Processing of Oxides
- Authors
- Baek, RH; BAEK, CHANG KI; Choi, HS; Lee, JS; Yeoh, YY; Yeo, KH; Kim, DW; Kim, K; Kim, DM; Jeong, YH
- Date Issued
- 2011-05
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Abstract
- In this paper, the volume trap densities N(t) are extracted from gate-all-around silicone-nanowire FETs with different gate oxides, using a cylindrical-coordinate-based flicker noise model developed. For extracting N(t), the drain-current power spectral densities were measured from a large number of identical devices and averaged over, thereby mimicking the spatial distribution of trap sites inducing 1/f curve. Also, effective mobility and threshold voltage were simultaneously extracted with the series resistance to characterize the 1/f noise in terms of intrinsic values of these two channel parameters. The volume trap densities thus extracted from different oxides (in situ steam-generated oxide/rapid thermal oxide/nitride-gated oxide) are compared and further examined using hot-carrier stress data. Finally, radius dependence of the cylindrical 1/f model developed is discussed.
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/14747
- DOI
- 10.1109/TNANO.2010.2044188
- ISSN
- 1536-125X
- Article Type
- Article
- Citation
- IEEE TRANSACTIONS ON NANOTECHNOLOGY, vol. 10, no. 3, page. 417 - 423, 2011-05
- Files in This Item:
- There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.