High-Performance Logic Transistor DC Benchmarking Toward 7 nm Technology-Node Between III-V and Si Tri-gate n-MOSFETs Using Virtual-Source Injection Velocity Model
SCIE
SCOPUS
- Title
- High-Performance Logic Transistor DC Benchmarking Toward 7 nm Technology-Node Between III-V and Si Tri-gate n-MOSFETs Using Virtual-Source Injection Velocity Model
- Authors
- Baek, RH; Kim, JS; Kim, DK; Kim, T; Kim, DH
- Date Issued
- 2016-02
- Publisher
- Pergamon Press Ltd.
- Abstract
- Injection velocity (v(inj)) is a unique figure-of-merit that determines logic transistor ON-current (ION) and switching delay (CV/I). This paper reports on Virtual-Source (VS) based analytical and physical model, which was calibrated by using state-of-the-art experimental data on III-V and Si tri-gate n-MOSFET, aiming to compare High-Performance (HP) logic transistor performance at 7 nm technology-node. We find that a significant increase in the virtual source injection velocity and improvement in the electrostatic integrity are critical, to meet the projected I-ON/I-OFF ratio for the 7 nm technology node. (C) 2015 Published by Elsevier Ltd.
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/37755
- DOI
- 10.1016/J.SSE.2015.11.031
- ISSN
- 0038-1101
- Article Type
- Article
- Citation
- SOLID-STATE ELECTRONICS, vol. 116, page. 100 - 103, 2016-02
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