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PARK, HONG JUNE(박홍준) scopus

Department: Dept of Electrical Engineering(전자전기공학과)

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Publication & Time Cited Count (For the Last 5 years)

Results 61-80 of 125 (Search time: 0.003 seconds).

Article

A QDR-Based 6-GB/s Parallel Transceiver With Current-Regulated Voltage-Mode Output Driver and Byte CDR for Memory InterfaceSCIESCOPUS

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, vol. 60, no. 2, page. 91 - 95, 2013-02

Article

A 1.9-GHz Fractional-N Digital PLL With Subexponent Delta Sigma TDC and IIR-Based Noise CancellationSCIESCOPUS

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, vol. 59, no. 11, page. 721 - 725, 2012-11

Article

A Transmitter to Compensate for Crosstalk-Induced Jitter by Subtracting a Rectangular Crosstalk Waveform From Data Signal During the Data Transition Time in Coupled Microstrip LinesSCIESCOPUS

IEEE Journal of Solid-State Circuits, vol. 47, no. 9, page. 2068 - 2079, 2012-09

Article

A 2 GHz Fractional-N Digital PLL with 1b Noise Shaping Delta Sigma TDCSCIESCOPUS

IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 47, no. 4, page. 875 - 883, 2012-04

Article

A 1.25 ps Resolution 8b Cyclic TDC in 0.13 mu m CMOSSCIESCOPUS

IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 47, no. 3, page. 736 - 743, 2012-03

Article

A 2-Gb/s Intrapanel Interface for TFT-LCD With a VSYNC-Embedded Subpixel Clock and a Cascaded Deskew and Multiphase DLLSCIESCOPUS

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, vol. 58, no. 10, page. 687 - 691, 2011-10

Article

A Single-Loop SS-LMS Algorithm with Single-Ended Integrating DFE Receiver for Multi-Drop DRAM InterfaceSCIESCOPUS

IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 46, no. 9, page. 2053 - 2063, 2011-09

Article

A Wide Lock-Range Referenceless CDR with Automatic Frequency AcquisitionSCOPUS

Journal of Electrical and Computer Engineering, 2011-08

Article

5-Gb/s Peak Detector Using a Current Comparator and a Three-State Charge PumpSCIESCOPUS

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, vol. 58, no. 5, page. 269 - 273, 2011-05

Article

A 21 fJ/Conversion-Step 100 kS/s 10-bit ADC With a Low-Noise Time-Domain Comparator for Low-Power Sensor InterfaceSCIESCOPUS

IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 46, no. 3, page. 651 - 659, 2011-03

Article

A 110 MHz to 1.4 GHz Locking 40-Phase All-Digital DLLSCIESCOPUS

IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 46, no. 2, page. 435 - 444, 2011-02

Article

An Analysis and Design Methodology of Resistor-Based Phase Error Averaging for Multiphase GenerationSCIESCOPUS

IEICE TRANSACTIONS ON ELECTRONICS, vol. E93C, no. 12, page. 1662 - 1669, 2010-12

Article

A Gate-Leakage Insensitive 0.7-V 233-nW ECG Amplifier using Non-Feedback PMOS Pseudo-Resistors in 0.13-mu m N-well CMOSSCIESCOPUSKCI

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, vol. 10, no. 4, page. 309 - 315, 2010-12

Article

A 1 GHz ADPLL With a 1.25 ps Minimum-Resolution Sub-Exponent TDC in 0.18 mu m CMOSSCIESCOPUS

IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 45, no. 12, page. 2874 - 2881, 2010-12

Article

A TX Clock Timing Technique for the CIJ Compensation of Coupled Microstrip LinesSCIESCOPUSKCI

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, vol. 10, no. 3, page. 232 - 239, 2010-09

Article

A High-Throughput On-Chip Variation Monitoring Circuit for MOSFET Threshold Voltage Using VCDL and Time-to-Digital ConverterSCIESCOPUS

IEICE TRANSACTIONS ON ELECTRONICS, vol. E93C, no. 8, page. 1333 - 1337, 2010-08

Article

Serpentine Microstrip Lines With Zero Far-End Crosstalk for Parallel High-Speed DRAM InterfacesSCIESCOPUS

IEEE TRANSACTIONS ON ADVANCED PACKAGING, vol. 33, no. 2, page. 552 - 558, 2010-05

Article

A 5 Gb/s Transmitter With a TDR-Based Self-Calibration of Preemphasis StrengthSCIESCOPUS

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, vol. 57, no. 5, page. 379 - 383, 2010-05

Article

A Digital Differential Transmitter with Pseudo-LVDS Output Driver and Digital Mismatch CalibrationSCIESCOPUS

IEICE TRANSACTIONS ON ELECTRONICS, vol. E93C, no. 1, page. 132 - 135, 2010-01

Article

A 4 Gb/s 3-bit Parallel Transmitter With the Crosstalk-Induced Jitter Compensation Using TXData Timing ControlSCIESCOPUS

IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 44, no. 11, page. 2891 - 2900, 2009-11

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