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PARK, HONG JUNE(박홍준) scopus

Department: Dept of Electrical Engineering(전자전기공학과)

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Publication & Time Cited Count (For the Last 5 years)

Results 1-20 of 34 (Search time: 0.002 seconds).

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Date Issued : [2000 TO 2009]

Article

A 4 Gb/s 3-bit Parallel Transmitter With the Crosstalk-Induced Jitter Compensation Using TXData Timing ControlSCIESCOPUS

IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 44, no. 11, page. 2891 - 2900, 2009-11

Article

A Low-Voltage High-Speed CMOS Inverter-Based Digital Differential Transmitter with Impedance Matching Control and Mismatch CalibrationSCIESCOPUSKCI

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, vol. 9, no. 1, page. 14 - 21, 2009-03

Article

A DISTORTION-FREE GENERAL PURPOSE LVDS DRIVERSCIESCOPUS

IEICE TRANSACTIONS ON ELECTRONICS, vol. E92-C, no. 2, page. 278 - 280, 2009-02

Article

Reduction of Transient Far-End Crosstalk Voltage and Jitter in DIMM Connectors for DRAM InterfaceSCIESCOPUS

IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, vol. 19, no. 1, page. 15 - 17, 2009-01

Article

A Serpentine Guard Trace to Reduce the Far-End Crosstalk Voltage and the Crosstalk Induced Timing Jitter of Parallel Microstrip LinesSCIESCOPUS

IEEE TRANSACTIONS ON ADVANCED PACKAGING, vol. 31, no. 4, page. 809 - 817, 2008-11

Article

Deadzone-minimized systematic offset-free phase detectorsSCIESCOPUS

IEICE TRANSACTIONS ON ELECTRONICS, vol. E91C, no. 9, page. 1525 - 1528, 2008-09

Article

FEXT-eliminated stub-alternated microstrip line for multi-gigabit/second parallel linksSCIESCOPUS

ELECTRONICS LETTERS, vol. 44, no. 4, page. 272 - 273, 2008-02

Article

A low-voltage OP amp with digitally controlled algorithmic approximationSCIESCOPUS

Proceedings of the Custom Integrated Circuits Conference, page. 499 - 502, 2008-01

Article

A SSN-Reduced 5Gb/s Parallel TransmitterKCI

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, vol. 7, no. 4, page. 235 - 240, 2007-12

Article

An 8.8-GS/s 6-bit CMOS time-interleaved flash analog-to-digital converter with multi-phase clock generatorSCIESCOPUS

IEICE TRANSACTIONS ON ELECTRONICS, vol. E90C, no. 6, page. 1156 - 1164, 2007-06

Article

A Design Guide of 3-stage CMOS Operational Amplifier with Nested Gm-C Frequency CompensationKCI

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, vol. 7, no. 1, page. 20 - 27, 2007-03

Article

A 0.12GHz-1.4GHz DLL-based clock generator with a multiplied 4-phase clock using a 0.18um CMOS process

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, vol. 6, no. 4, page. 264 - 269, 2006-12

Article

A digital CMOS PWCL with fixed-delay rising edge and digital stability controlSCIESCOPUS

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, vol. 53, no. 10, page. 1063 - 1067, 2006-10

Article

A three-data differential signaling over four conductors with pre-emphasis and equalization: A CMOS current mode implementationSCIESCOPUS

IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 41, no. 3, page. 633 - 641, 2006-03

Article

Extraction of LRGC matrices for 8-coupled uniform Lossy transmission lines using 2-port VNA measurementsSCIESCOPUS

IEICE TRANSACTIONS ON ELECTRONICS, vol. E89C, no. 3, page. 410 - 419, 2006-03

Article

A VCDL-based 60-760-MHz dual-loop DLL with infinite phase-shift capability and adaptive-bandwidth schemeSCIESCOPUS

IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 40, no. 5, page. 1119 - 1129, 2005-05

Article

An all-digital CMOS duty cycle correction circuit with a duty-cycle correction range of 15-to-85% for multi-phase applicationsSCIESCOPUS

IEICE TRANSACTIONS ON ELECTRONICS, vol. E88C, no. 4, page. 773 - 777, 2005-04

Article

A 66-333-MHz 12-mW register-controlled DLL with a single delay line and adaptive-duty-cycle clock dividers for production DDR SDRAMsSCIESCOPUS

IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 39, no. 11, page. 2087 - 2092, 2004-11

Article

A decision feedback equalizing receiver for the SSTL SDRAM interface with clock-data skew compensationSCIESCOPUS

IEICE TRANSACTIONS ON ELECTRONICS, vol. E87C, no. 5, page. 809 - 817, 2004-05

Article

An 8-GS/s 4-bit 340 mW CMOS time interleaved flash analog-to-digital converterSCIESCOPUS

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, vol. E87A, no. 2, page. 350 - 356, 2004-02

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